A significant portion of commercial data is represented in decimal format. In contrast, the most widely used hardware-implemented format is binary floating point (BFP) format, which fails to correctly perform decimal calculations. Therefore, applications that use decimal data pay heavy penalties in performance since they require use of software for performing decimal arithmetic. Thus, the decimal floating point (DFP) format of a decimal floating point computing unit implemented in hardware has inherent advantage in reducing the run time of such applications. The decimal floating point format is described in various publications, including an International Business Machines Corporation publication by IBM Labs in Haifa entitled “Floating-Point Test-Suite for IEEE”, Version 1.01; May 2005, the entirety of which is hereby incorporated herein by reference.
As is known, test cases are employed in testing of instructions. The effectiveness of test cases generated in pseudo-random fashion mainly depends upon the overhead encountered during test case generation. In decimal floating point testing, selecting meaningful operands can significantly contribute to such overhead. Since the contents of floating point registers (containing DFP operands) are interpreted to have only encoded (packed) data, substantial time may be spent on generating and encoding these operands before placing them in floating point registers. A means for reducing this overhead related to pseudo-random generation of decoded DFP operands, and then encoding of the operands, is needed in order to enhance the testing process. Furthermore, since operand interdependency is significant in overall test effectiveness, techniques to enhance such interdependency are desired to improve instruction test quality. The present invention is directed to meeting these needs.